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ABOUT ME · MY PERSONAL SCHEMATIC

Rafael Amador

FIG · 00 · THE AUTHOR

Rafael
Amador

  • 1

    EDUCATION

    UT Dallas · Class of 2028 · Dean's List · 3.945 GPA

  • 2

    MOST RECENT POST

    Hardware Engineering Intern · Thales CSP, Plantation FL · Jun-Aug 2026

  • 3

    RESEARCH

    RIDE Lab, UT Dallas · closed-loop filament extrusion rebuild; drafted IEEE-format paper

  • 4

    FIELD RECORD

    Two 1st-place track wins at HackAI 2026 (Vizzion): IEEE + TI · Google Antigravity

Every sheet on this portfolio documents my work, my learnings, and most importantly my mistakes. I love the challenge of finding solutions to uncommon problems, those that require a deep understanding of their principles.

I build from first principles: in the computer world, that means understanding logic from the basics: transistors. I've only started, but I can't stop thinking that even at the peak of my career I will only have scratched the surface. This world of new boundaries has no limits, only our resilience, and our ability to work together, can break the progress ceiling.

MECH CAD
Fusion 360 / SolidWorks
PCB
OrCAD / Altium
FIRMWARE
C++ / Java
TOOLING
Python
WEB & AGENTS
TypeScript
DIGITAL LOGIC
SystemVerilog